In semiconductor packages using a lead frame which are typified by QFPs (Quad Flat Packages), outer leads for connection with a printed wiring board are arranged on side surfaces of a semiconductor package. With a desired photoresist pattern being formed on both sides of a metal plate, which is etched from both sides, a lead frame is capable of obtaining inner leads and outer leads as connection portions with a semiconductor element mount portion and semiconductor element electrodes, and also obtaining an outer frame portion that fixes these leads.
Furthermore, other than the etching method, punching by a press can be used to obtain the leads and the outer frame portion.
As assembly steps of a semiconductor package, a semiconductor element is die-bonded to a semiconductor element mount portion, and then gold wires or the like are used to electrically connect electrodes of the semiconductor element to inner leads. After that, the area in the vicinity of the semiconductor element including the inner lead portion is resin-molded, its outer frame portion is cut, and, as required, outer leads are subjected to bending work.
As for the outer lead installed on the side surface in this manner, it is said that the limit of the number of pins is 200 to 300 for a package size of 30 mm square, in terms of the machining ability for microsizing.
In recent years, with the increase in the number of electrodes of a semiconductor element, semiconductor packages of a lead frame type that has outer leads on the side surfaces have become incapable of keeping up with the number of electrodes. As a result, some of them are being replaced with semiconductor packages of a BGA (Ball Grid Array) or LGA (Land Grid Array) type or other types in which external connection terminals for connection with the printed wiring board are arranged in an array on the bottom surface of the package substrate. In a typical substrate for use in these, holes are made in a copper-clad glass epoxy substrate with a drill, and the holes are plated to provide conductivity. One surface of the substrate is formed with terminals for connection with the electrodes of the semiconductor element. The other surface is formed with external connection terminals arranged in an array.
However, this poses the following problems. The manufacture of such substrates has complex steps, leading to higher costs. In addition, reliability is inferior to that of the packages of a lead frame type because plating is used for wiring connections within the substrate.
Therefore, there is disclosed a BGA-type semiconductor package structure using a lead frame that utilizes a step of etching the lead frame from both sides (for example, see Patent Document 1).
In this structure, etching is performed simultaneously on both surfaces with the photoresist patterns being different on front and rear surfaces. Alternatively, after etching is performed on a first side, an electrodeposited polyimide resin layer is formed or a pre-mold resin is spread on a surface layer of the etched surface, and then etching is applied from a second surface. Thereby, connection terminals of the semiconductor element electrodes are formed on the first surface, and external connection terminals are formed in an array on the second surface.